Partnership Works on Strained Silicon Process

By Paul Bickerdyke, Electronics News Australia -- Electronic News, 7/22/2003
Taiwanese chip manufacturer United Microelectronics Corp. is developing a 70nm manufacturing process based on strained silicon to improve chip performance. The foundry has teamed up with strained silicon specialists AmberWave to produce wafers with test circuits that are said to provide a number of benefits over conventional CMOS devices.

Strained-silicon technology is being promoted as one way to extend chip performance by enhancing the intrinsic current-drive capability of MOSFETs. UMC says its test circuits show improvements up to 20 percent in current drive and 10 percent in speed compared with conventional CMOS.

“Strained silicon offers an alternative path to performance improvements without aggressive gate length shrinkage,” said S W Sun, VP of UMC’s central research and development division. “We are working with AmberWave to enhance p-channel transistor performance, improve strained layer defect density, and decrease substrate-costs associated with this strained silicon technology.”

Using substrates with strained silicon improves the speed of transistors by stretching the silicon lattice. In effect, it “turbo-charges” the device -- with the transistors showing improved electrical characteristics, enhanced performance and reduced power consumption.

A major advantage is that semiconductor companies do not have to make significant changes to their existing design and manufacturing set-ups to achieve these benefits. This is because strained silicon is basically an enhancement on existing manufacturing techniques, extending the life of existing production assets by reducing the need for capital investments for new technologies.

UMC is partnering with AmberWave, a strained-silicon specialist founded in 1998 as a spin-off from research institute and university MIT.

AmberWave’s epsilon-MOS technology “stretches” the silicon lattice by building it on top of a silicon germanium (SiGe) base material that is larger at the atomic scale than pure silicon, using precision layering techniques and a proprietary chemical-mechanical polishing process.

Transistors fabricated with epsilon-MOS are said to have improved electrical properties and increased performance without the defects that have affected previous strained-silicon technologies. This results in chips that operate at higher clock rates while consuming less power.

“AmberWave is seeing the interest in strained silicon accelerate significantly as companies look for ways to address the transistor performance challenges associated with deep submicron technology,” said the company’s CEO, Mitch Tyson.

About AmberWave Systems
Founded in 1998, AmberWave Systems has become a leader in the research, development and licensing of advanced technologies for semiconductor manufacturing. By funding and guiding university research, AmberWave Systems is bringing new technology developments to fruition through patents and technology licensing. In conjunction with its university research projects, AmberWave Systems conducts its own research, development and limited manufacturing in its semiconductor fabrication facility in Salem, New Hampshire. In addition, AmberWave Systems collaborates with other technology focused companies to further expand and develop its research. For more information about the company, please visit its Web site at www.amberwave.com.