MIT spinout preps commercial strained silicon

EE Times:
MIT spinout preps commercial strained silicon

David Lammers David Lammers
EE Times
(10/22/2001 4:02 PM EDT)

AUSTIN, Texas — AmberWave Systems Corp. (Salem, N.H.) plans to have its strained-silicon technology ready for commercial use by the middle of next year. Strained silicon — which uses a layer of silicon germanium to stretch the atomic lattice of the top layer of active silicon — promises to dramatically improve wafer performance without having to move to advanced design rules.

The technology emerged from the labs earlier this year when IBM researchers discussed it in two papers at the VLSI Technology Symposium in Kyoto, Japan.

Since then, AmberWave has been waving its own flag, saying that its open intellectual-property (IP) and foundry model will allow designers everywhere to take advantage of the performance gains, or reduced power consumption, possible with strained silicon. The MIT spinout said it has signed an unidentified major foundry to support its technology

Eventually, chief executive officer Mark Wolf said, all of the major foundries will support the approach, which uses standard CMOS processing steps. "People will pay for it when they see that it is working," Wolf said. Venture capitalists have sunk about $50 million into AmberWave, which has received five patents and applied for more than 70 others.

Chip companies are investigating the approach, Wolf said. He expects microprocessor and field-programmable gate array makers to be among the early adopters, rolling out products as early as 2003. The company's advisory board includes senior staff from Analog Devices, Bay Networks, Sycamore, Qualcomm and Xilinx.

Strained-silicon MOSFETs are created by growing a graded layer of silicon germanium, several microns thick, on a bulk silicon wafer. A much thinner layer of silicon is grown on top of the SiGe buffer. Because the SiGe layer is much thicker, the larger germanium atoms stretch the silicon atoms in the active layer, allowing for much higher electron mobility and somewhat higher hole mobility in CMOS devices. The dislocations at the SiGe-silicon interface must be removed, and AmberWave has patented chemical mechanical polishing techniques that remove the crosshatch defects without damaging the active silicon layer.

Commercial wafers
Wolf would not name either the foundry his company is working with or the two wafer suppliers that he said are preparing to offer commercial-grade wafers with the strained-silicon layer. He said the foundry is one of the two capable of 0.13-micron design rules.

AmberWave's business model is built largely on royalties. Design teams that use AmberWave's intellectual property would fabricate their chips at a foundry and pay AmberWave "based on their success," Wolf said.

Gene Fitzgerald founded AmberWave in 1998 along with an MIT graduate, Mayank Bulsara, who had studied under Fitzgerald at MIT.

As a graduate student at Cornell University 15 years ago, Fitzgerald became interested in lattice mismatch technology. By the early '90s he was contributing to some of the seminal papers in the field while working at Bell Labs. There, he spent several years developing techniques to minimize the defects that occur when the silicon germanium opens up, or relaxes, the silicon lattice. "I spent a long time looking just at how the defects come in, and fortunately I was interested both as an electronics engineer who liked devices and as a materials research person. What I realized is that if you look at multiple interfaces [between the SiGe and silicon layers], and not at just a single interface, the defects can interfere with each other [canceling each other out]. That approach definitely proved to be logical, because within two months or so we had demonstrated devices, at the Materials Research Society meeting in San Francisco in 1991, that showed the highest mobility ever reported."

Frustrated with the lack of support from management at Lucent for the approach, Fitzgerald moved to MIT, where he continues to hold a professorship in material science. Many of the staff at AmberWave are drawn from MIT, which continues to support academic research into strained silicon.

Wearing his professor's hat, Fitzgerald has directed a research project at MIT that will publish its results in the November letters of the Applied Physics Society, showing a compressed germanium channel that enables an 8x hole enhancement, compared with conventional silicon.

Those devices were created at a research fabrication facility at MIT.

At AmberWave, using a different foundry to develop commercial-level devices, Fitzgerald has been able to demonstrate 80 percent enhancement to electron mobility in the NMOS devices and 40 percent speedup of hole mobility in the PMOS devices.

Wolf argues that companies will be able to use strained-silicon wafers, costing not much more than today's epitaxial silicon wafers, and get performance improvements without going to extremely advanced design rules. A 130-nm process in strained silicon might run as fast as a 100-nm process in conventional silicon, for example.

Ghavam Shahidi, an IBM fellow who manages the strained-silicon and silicon-on-insulator (SOI) efforts at IBM's facility in East Fishkill, N.Y., said that is an unlikely scenario. "As long as the lithography keeps advancing, we believe customers will choose to follow scaling in order to get the higher transistor densities and other advantages," he said.

Strain shows
A strain is developing between IBM and AmberWave. After IBM presented its work at the VLSI symposium, Wolf said, AmberWave contacted IBM and offered to discuss certain patents that AmberWave claims are fundamental to strained-silicon technology. "Their response was, 'We'll get back to you.' "

Shahidi said IBM has patents of its own, stemming from its long work in silicon germanium technology. "We don't need anybody, especially them," Shahidi said in a telephone interview.

Shahidi, who was named an IBM fellow this year after a decade of pioneering work in SOI technology, said his company plans to merge its SOI technology with its strained silicon research. But he cautioned that strained silicon is perhaps three to five years away from commercialization.

"Strained silicon is very exciting, with great potential, but it still has a long way to go before it reaches the commercial stage. There is a lot of work needed to control the defects in order to get decent yields and reliability. There are a lot of process issues, questions about whether you keep getting the benefits of strained silicon at extremely short channel lengths when the poly [channel length] gets below 50 nanometers," he said.

Fitzgerald said he and his team had worked through many of the research-level issues before AmberWave was founded. Since 1998, the effort has been to package a commercializable version of the technology, based on an IP model that will allow fabless semiconductor companies to work with a foundry.

Many of those customers are expected to be in communications, where higher frequencies are needed. AmberWave also will offer a buried-channel version of its technology for wireless ICs to isolate devices and reduce noise interference.

Longer term, Fitzgerald said, gallium arsenide (GaAs) and indium gallium arsenide (InGaAs) devices for photonics can be merged on the same die with digital CMOS built in strained silicon. Motorola Labs also recently demonstrated a much different approach to growing epitaxial films of GaAs on a silicon wafer.

Fitzgerald said that at 100 percent concentrations of germanium in the buffer layer, the atomic spacing between GaAs and germanium is close enough that the germanium acts as a bridge between the silicon and the GaAs atoms.

Putting a midlevel performance laser, created in a film of GaAs, alongside relatively fast digital circuits is attractive to the fiber-optic and networking industries. But Fitzgerald said another, less obvious opportunity is optical interconnects, citing Intel Corp.'s recently disclosed work in on-chip optical interconnects as an example.

About AmberWave Systems
Founded in 1998, AmberWave Systems has become a leader in the research, development and licensing of advanced technologies for semiconductor manufacturing. By funding and guiding university research, AmberWave Systems is bringing new technology developments to fruition through patents and technology licensing. In conjunction with its university research projects, AmberWave Systems conducts its own research, development and limited manufacturing in its semiconductor fabrication facility in Salem, New Hampshire. In addition, AmberWave Systems collaborates with other technology focused companies to further expand and develop its research. For more information about the company, please visit its Web site at www.amberwave.com.